Paraqum Hevc Decoder
HEVC video decoder IP core by Paraqum Technologies is an all-hardware, high performance video decoder which is easily integrable to complex FPGA based SoCs and supports upto 4K video decoding at 30 fps on Xilinx 7 series FPGAs. The core architecture is optimized for very low resource utilization. Coupled with low running frequencies, ParaQum HEVC Decoder IP core is ideal for deployment in mid-range FPGAs.
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Key Features

  • Compliance standard – HEVC (H.265) Main profile Level 5.0
  • Max output bitrate - 4K@30fps / 1080p@120fps
  • Max input bitrate - 20Mbps
  • Input Format – H.265 Elementary streams
  • Output color format – YUV
  • Chroma formats - 4:2:0/4:2:2/4:4:4
  • Pixel Bit depth 8bits, 10bits, 12bits
  • Max frequency - 150 MHz
  • Device family support - Zynq 7000, Kintex 7, Virtex 7
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