Functional Overview
The Paraqum SDR development board is a fully configurable wideband SDR platform for RF applications. The hardware is based on the High performance, Highly integrated agile RF transceiver AD9361 from Analog Devices.
The functional block diagram is given below.
The SDR board is a FPGA mezzanine card(FMC) requiring a carrier FPGA board for operation. We support Xilinx FPGA development boards with FMC connectors.
This board is fully compatible with open source SDR platform GNU Radio. All the waveform monitoring and other GNU Radio components are functional.
Functional Specifications
RX interface
- Operational Frequency range: 70MHz to 6GHz
- Channel bandwidth: Tunable from 200KHz to 56MHz
- Supports up to 2 direct conversion RF receive channels
- Fully integrated synthesizers (including loop filter)
- Data path consists of LNA, Demodulator, LPF, ADC and digital filters
- Independent automatic gain control
- AGC, Quadrature calibration and DC offset calibration
- NF: 2.5dB @1GHz
- ADC: Continuous time sigma-delta, 640MSPS
- Digital Filters: 128 complex taps, decimation between 2 and 48
- Gain: 1dB step size, 80dB analog range, 30dB digital range (post ADC scaling)
- On-chip sensor for temperature-corrected RSSI
TX interface
- Operational Frequency range: 47MHz to 6GHz
- Channel bandwidth: Tunable from 200KHz to 56MHz
- Supports up to 2 direct conversion RF receive channels
- TX noise: < -157dBm/Hz noise floor
- Fully integrated synthesizers (including loop filter)
- Data path consists of digital filters, DAC and Modulators
- Digital Filters: 128 complex taps, interpolation between 2 and 48
- Gain: 0.25dB step size, 86dB range.
- DAC: 320MSPS
Data communications
- LVDS/CMOS interface
- Standard FMC connector
- Compatible with Xilinx AD9361 core
Control/Monitor
- Dedicated control/monitor signals
- SPI signals available vial the FMC connector
- Dedicated signals for monitoring internal signals via the FMC connector