Overview


Paraqum is proud to have gathered a vast amount of experience and expertise in the field of FPGA design through its research and development work for both its own product line and design services. Frequent research publications in leading conferences on related fields bears testimony to the fact that Paraqum is expanding technological frontiers in designing state of the art designs with FPGAs.
Using FPGA, Paraqum has been able to achieve astonishing performance leveraging hardware acceleration and parallel processing.
Fpga Designs Main

Our own product line employing FPGAs , spreads over two application domains; Network analytics and Video coding. In late 2014 Paraqum became the first in the world to do a real time H.265 decoding of 4K video on an FPGA with its decoder. Starting from there, video coding product portfolio continued to real time HEVC encoding and HEVC-SCC encoding which require hardware acceleration to be performed in real time. All these projects with months of development added up a huge amount of experience and expertise to the RTL design team. We have published our ground-breaking work in prestigious journals and conferences such as IEEE Transactions on Circuits and Systems for Video Technology and International Conference on Application Specific Architectures and Processors (ASAP).

Design flow

FPGA design team has created our own customized design flow to take your design from specs to robust high-performance prototypes in a short time. The design flow consists of creating C++ models of the design which are later used to verify the FPGA design once created. Our system architects come up with the most efficient architectures to put the design in the least cost device while achieving desired performance goals. Then the RTL development proceeds to realize these architectures. All the designs are rigorously tested in simulations as individual units and as combined designs using the bit accurate C++ models before the final design is brought up. Numerous input combinations including rarely hit corner cases are included in the test cases to ensure that the design works fine under all circumstances. The final design goes through multiple stages of testing starting with pre-synthesis simulation with multitude of test cases followed by post synthesis simulations. Finally, the design is rigorously tested in FPGA development boards before they are offloaded to the actual system where they are validated again.

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